公司信息,社会责任,新闻,展会活动,行业洞察等等
以集成电路设计为基础,开展以融合通信为平台的技术研发;布局“芯片、软件(模组)、终端、系统、信息服务”产业链,聚焦能源互联网、智能化这两个战略新兴领域,打造国际一流企业
依托成熟的电力线载波通信技术,结合WIFI、蓝牙、RF等通讯方式,开展以融合通信为平台的技术研发,从“芯”开始,构建一个安全、智慧、绿色的智能化系统。
Core | ARM 32-bit Cortex-M3 CPU Up to 72MHz (3T 96MHz) Supports MPU |
Memories | Flash memory up to 512K bytes SRAM data memory up to 80K bytes Extend external memory by EBI |
Power Supply & Reset | Operating voltage range: 2.6V≤VDD≤5.5V POR, BOR (16 threshold options available), LVD |
Clocks | External high speed crystal oscillator: 1~24MHz Internal high speed RC oscillator: 24MHz output External low speed crystal oscillator: 32.768KHz Internal low speed RC oscillator: 32.768KHz Internal ultra low speed RC oscillator: 10KHz PLL up to 72MHz |
Low-Power Modes |
Several low power modes available :Sleep,Stop 1,Stop 2,Standby |
System Peripherals | Serial Wire Debug (SWD) protocol Debug Configuration Control (DBGC) DMA: 12 multiplexed channels PIS: 16 peripheral interconnect channels Watchdog timers: IWDT and WWDT SysTick timer |
Interface Resource | General I/Os: up to 90 general I/Os LCD:8×36 pixel |
Analog |
1 x12-bit ADCs: 1MSPS, 16 external analog channels 2 x12-bit DACs: sampling rate up to 500KHz 2 x analog comparators Temperature sensor |
Timers | 4 x 16-bit general-purpose timers: 4 independent input capture and output compare channels |
Communication Interfaces | 2 x I2C interfaces: multi-master capability and arbitration; 16 level depth FIFO 3 x SPI/I2S interfaces: 16 level depth FIFO, I2S supports host usage 5 x UARTs: 16 level depth FIFO, automatic baud rate detection, infrared modulation function; UART4 supports ISO7816 1 x CAN: CAN2.0B |
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